////////////////////////////////////////////////////////////////////////////
//  Licensed under the Apache License, Version 2.0 (the "License");
//  you may not use this file except in compliance with the License.
//  You may obtain a copy of the License at
//
//    http://www.apache.org/licenses/LICENSE-2.0
//
//  Unless required by applicable law or agreed to in writing, software
//  distributed under the License is distributed on an "AS IS" BASIS,
//  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
//  See the License for the specific language governing permissions and
//  limitations under the License.
//
//  Copyright (c) Microsoft Corporation.  All rights reserved.
//  Portions Copyright (c) Kentaro Sekimoto All rights reserved.
//
////////////////////////////////////////////////////////////////////////////

#include <tinyhal.h>
#include "..\..\..\DeviceCode\Targets\Native\RX62N\DeviceCode\iodefine.h"

//--//

#ifdef __cplusplus
extern "C" {
#endif
void BootstrapCode_Ext_SRAM(void)  __attribute__((section("SectionForBootstrapOperations")));
void BootstrapCode_Board(void)  __attribute__((section("SectionForBootstrapOperations")));
#ifdef __cplusplus
}
#endif

void BootstrapCode_Ext_SDRAM(void) __attribute__ ((section ("SectionForBootstrapOperations")));
void BootstrapCode_Ext_SDRAM(void)
{
    SYSTEM.SCKCR.LONG = 0x00010100;     /* ICK×8 BCK×4 PCK×4 */
    SYSTEM.SYSCR0.WORD = 0x5A03;        /* KEY=0x5A,EXBE=1,ROEME=1 */

    IOPORT.PF3BUS.BYTE = 0x00;          /* Disables the A23-A16 output P.628 */
    IOPORT.PF4BUS.BYTE = 0xFF;          /* Enables the A15-A0 output P.629 */
    IOPORT.PF5BUS.BYTE = 0x10;          /* PC7-0 are designated as the A23-A to A16-A pins */
                                        /* PE7-0 are designated as D15 to D8 pins */
    IOPORT.PF6BUS.BYTE = 0xD0;          /* All pin functions for the SDRAM are enabled */
                                        /* SDCLK output is enabled */

    BSC.SDIR.WORD = 0x0021;             /* Initial Auto Refresh Interbal 4cycle */
                                        /* Initial Auto Refresh time 2time */
                                        /* Initial Precharge cycle 3cycle */
    BSC.SDICR.BYTE = 0x01;              /* Initialization Sequence Start */
    BSC.SDCCR.BYTE = 0x00;              /* A 16-bit bus space is selected */
    BSC.SDMOD.WORD = 0x0020;            /* Writing to these bits. Mode register set command is issued */
    BSC.SDRFCR.WORD = 0x3170;           /* Auto-Refresh Cycle is 4 cycles*/
                                        /* Auto-Refresh Request is 749 cycles */
    BSC.SDRFEN.BYTE = 0x01;             /* Auto-Refresh operation is enable */
    BSC.SDCMOD.BYTE = 0x00;             /* Endian of SDRAM address space is the same as the endian of operating mode.*/
    BSC.SDAMOD.BYTE = 0x01;             /* Continuous access is disabled */
    BSC.SDTR.LONG = 0x00020202;         /* SDRAMC Column Latency is 3 cycles */
                                        /* Write Recovery Interval is 1 cycles */
                                        /* Row Precharge Interval is 3 cycles */
                                        /* Row Column Latency is 2 cycles */
                                        /* Row Active Interval is 3 cycles */
    BSC.SDADR.BYTE = 0x01;              /* Address Multiplex is 8bit shift */
    BSC.SDCCR.BIT.EXENB = 1;            /* Operation is enabled */
}

void BootstrapCode_Board(void) __attribute__ ((section ("SectionForBootstrapOperations")));
void BootstrapCode_Board(void)
{
	BootstrapCode_Ext_SDRAM();
}
